Logic Design and Verification Using SystemVerilog
| Author | : | |
| Rating | : | 4.31 (649 Votes) |
| Asin | : | 1500385786 |
| Format Type | : | paperback |
| Number of Pages | : | 328 Pages |
| Publish Date | : | 2015-05-10 |
| Language | : | English |
DESCRIPTION:
His former book, The Verilog Hardware Description Language, was co-authored with Verilog inventor Phil Moorby and was widely used in industry and universities. His research topics include high-level synthesis, register-transfer level simulation and languages, hardware-software co-design, integrated circuit lifetime reliability, and hardwa
Note: This book has been replaced by a new edition titled "Logic Design and Verification Using SystemVerilog (Revised)" with ISBN 978-1523364022. It is directed at: • students currently in an introductory logic design course that also teaches SystemVerilog, • designers who want to update their skills from Verilog or VHDL, and • students in VLSI design and advanced logic design courses that include verification as well as design topics. SystemVerilog is a Hardware Description Language that enables designers to work at the higher levels of logic design abstractions that match the increased complexity of current day integrated circuit and field-programmable gate array (FPGA) designs. The book starts with a tutorial introduction on hardware description languages and simulation. It proceeds to the register-transfer desi
About the Author Donald Thomas is Professor of Electrical and Computer Engineering at Carnegie Mellon University, where he has taught courses Logic Design and Verification, and Embedded Systems. His former book, The Verilog Hardware Description Language, was co-authored with Verilog inventor Phil Moorby and was widely used in industry and universities. His research topics include high-level synthesis, register-transfer level simulation and languages, hardware-software co-design, integrated circuit lifetime reliability, and hardware-based machine leaning.
"An OK reference, but only because there isn't much else out there." according to Tempest. It's a okay introductory book that has at least a few flaws:1. Chapter questions do not have easily-attainable solutions, at least from what I can read. This arguably makes it much more of classroom textbook, rather than a designer's reference. If anyone knows where I can find them, let me know and I'll modify my review. Other than that, assume you'll need a . "Strongly Recommended!" according to Jonathan Yedidia. This is an excellent, up-to-date book. There are plenty of clear, tutorial-style explanations, with equal emphasis on logic design, verification, and the SystemVerilog language. It's the best book I've found so far on these subjects. I'm guessing that Prof. Thomas certainly could have published this book with one of the major scientific publishers, but that h